Non-volatile memory devices (e.g., electrically erasable programmable read-only memory (EEPROM) and flash, etc.) are in widespread use in the industry today. Non-volatile memory (NVM) devices are used in compact flash cards for digital cameras, memory sticks, jump drives, EEPROM chips for booting-up devices (e.g., basic input/output system (BIOS)), and in many other applications.
In an NVM cell with an oxide-nitride-oxide (ONO) structure, a polysilicon gate may be on a 3-layer dielectric ONO structure formed with a nitride charge trapping layer over a tunneling oxide layer, and below a blocking oxide layer. To program the cell in one conventional approach, charge is injected into the nitride layer using Fowler-Nordheim (F-N) tunneling through the tunneling oxide layer, and this is done at relatively high voltages (e.g., in the 14 V to 18 V range). In order to keep the operating voltages in a reasonable range, the tunneling oxide layer has to be quite thin (e.g., about 20 Å). However, such a thin tunneling oxide layer can cause data retention problems whereby charge may leak from the nitride over the operating lifetime of the NVM cell.
In another conventional approach, NVM cell programming is done using channel hot electron (CHE) injection, and erasing with band-to-band tunneling hot holes (BTBT-HH). The problem with this approach is the relatively high voltages required to induce band-to-band tunneling to perform the erase. In addition, the holes in BTBT-HH tend to create a lot of damage in the tunneling oxide layer, thus impacting the cell reliability. Further, the hot electron and hot hole distributions are both very close to the junction, yet not spatially matched. Thus, the peaks of the hot electron and hot hole injections occur in different places in the charge trapping layer, resulting in long term reliability issues.